6月1日至5日，第37屆國(guó)際功率半導(dǎo)體器件和集成電路年會(huì)（IEEE ISPSD，IEEE The 37th International Symposium on Power Semiconductor Devices and ICs）在日本召開(kāi)。IEEE ISPSD是功率半導(dǎo)體領(lǐng)域最具影響力的國(guó)際學(xué)術(shù)會(huì)議，被譽(yù)為該領(lǐng)域的“奧林匹克”盛會(huì)。此次會(huì)議吸引了來(lái)自全球的672名學(xué)者和工程技術(shù)人員參與，共發(fā)表了來(lái)自16個(gè)國(guó)家和地區(qū)的176篇學(xué)術(shù)論文，展示了全球功率半導(dǎo)體技術(shù)的最新研究進(jìn)展。
電子科技大學(xué)集成電路學(xué)院功率集成技術(shù)實(shí)驗(yàn)室（PITeL）主任張波教授帶領(lǐng)團(tuán)隊(duì)25名師生參加了此次盛會(huì)，與全球同行分享了功率半導(dǎo)體的最新成果，共錄用21篇論文（其中牽頭發(fā)表16篇，含4篇Oral報(bào)告和12篇Poster論文），占全球發(fā)文總量的11.9%，無(wú)論是第一單位發(fā)表論文數(shù)還是發(fā)表論文總數(shù)均居全球第一。這是實(shí)驗(yàn)室自2013年以來(lái)第9次發(fā)表論文數(shù)位居全球第一。
功率集成技術(shù)實(shí)驗(yàn)室25名師生參加第37屆IEEE ISPSD國(guó)際會(huì)議
功率集成技術(shù)實(shí)驗(yàn)室作為“功率半導(dǎo)體領(lǐng)域研究最為全面的學(xué)術(shù)團(tuán)隊(duì)”，在功率半導(dǎo)體領(lǐng)域具備40余年深厚學(xué)術(shù)積淀，入選論文主題涵蓋了低壓功率器件（LVT）、氮化鎵功率器件（GaN）、功率集成電路設(shè)計(jì)（ICD）、碳化硅器件（SiC）和高壓器件（HV）等重要領(lǐng)域，深入探討了硅基/寬禁帶功率半導(dǎo)體理論、器件新結(jié)構(gòu)、功率集成技術(shù)、功率IC設(shè)計(jì)技術(shù)、可靠性等核心議題。
功率集成技術(shù)實(shí)驗(yàn)室牽頭的4篇Oral報(bào)告
陳星弼院士發(fā)明的“超結(jié)”，被國(guó)際譽(yù)為“功率MOS的里程碑”。功率集成技術(shù)實(shí)驗(yàn)室長(zhǎng)期堅(jiān)持功率超結(jié)器件研究，章文通教授在其Oral報(bào)告中將超結(jié)理論推廣應(yīng)用于SOI材料，與合作企業(yè)一起創(chuàng)建了國(guó)內(nèi)首個(gè)高溫高壓超結(jié)SOI BCD工藝平臺(tái)，核心器件功率優(yōu)值（FOM）達(dá)15.76 MW/cm2，也是國(guó)際首個(gè)FOM > 15 MW/cm2的硅基高壓集成器件，并已通過(guò)175℃高溫HTRB等可靠性考核，為國(guó)內(nèi)車(chē)規(guī)級(jí)高溫高壓SOI基BCD工藝技術(shù)奠定了基礎(chǔ)。在超結(jié)分立器件方面，實(shí)驗(yàn)室報(bào)道了600~1500 V超結(jié)器件，重點(diǎn)探討了其開(kāi)關(guān)特性和電磁干擾（EMI）優(yōu)化等最新技術(shù)，并首次引入神經(jīng)網(wǎng)絡(luò)AI工具指導(dǎo)分立超結(jié)器件的設(shè)計(jì)和流片。
功率集成技術(shù)實(shí)驗(yàn)室牽頭的12篇Poster報(bào)告
實(shí)驗(yàn)室積極開(kāi)展寬禁帶功率半導(dǎo)體芯片研究，此次會(huì)議在GaN領(lǐng)域入選了3篇Oral文章，其中，陸毅博士報(bào)道了一種適用于寬電源電壓應(yīng)用的單片集成GaN驅(qū)動(dòng)器，聚焦高速全GaN單片驅(qū)動(dòng)與智能保護(hù)，能滿(mǎn)足數(shù)據(jù)中心三次電源高頻GaN末級(jí)驅(qū)動(dòng)應(yīng)用需求；俞程博士創(chuàng)造性地提出在p-GaN HEMT緩沖層中引入空穴補(bǔ)償層（HC-HEMT），并首次在p-GaN柵HEMT中觀(guān)測(cè)到了類(lèi)雪崩擊穿行為，所發(fā)現(xiàn)的新機(jī)制有效解決了傳統(tǒng)HEMT器件中無(wú)雪崩擊穿的問(wèn)題，顯著提升了器件在重復(fù)過(guò)電壓條件下的耐受能力，為大幅提高GaN HEMT的可靠性開(kāi)辟了新途徑；王釗博士則深入研究了總劑量輻射下p型柵氮化鎵HEMTs漏電流（Ioff）非單調(diào)退化效應(yīng)，并揭示了其輻射損傷機(jī)制，為極端環(huán)境下器件可靠性的分析提供了重要支撐。
自2006年功率集成技術(shù)實(shí)驗(yàn)室在IEEE ISPSD論文實(shí)現(xiàn)零的突破以來(lái)，迄今已在該國(guó)際會(huì)議發(fā)表學(xué)術(shù)論文130余篇。在今年的ISPSD會(huì)議中，功率集成技術(shù)實(shí)驗(yàn)室13名同學(xué)以第一作者發(fā)表了論文，充分展示了實(shí)驗(yàn)室在人才培養(yǎng)方面的顯著成效。截至目前，實(shí)驗(yàn)室已培養(yǎng)博士99名、碩士1288名。“功率半導(dǎo)體領(lǐng)域最大學(xué)術(shù)研究團(tuán)隊(duì)”正不斷發(fā)展壯大，持續(xù)為全球功率半導(dǎo)體發(fā)展貢獻(xiàn)“成電力量”。
附錄：功率集成技術(shù)實(shí)驗(yàn)室2025年IEEE ISPSD發(fā)表論文列表：
第一單位Oral
1. Wentong Zhang, Jiangnan Mu, et al., “Charge Field Modulation Mechanism and its Experiments in SJ-based SOI BCD Process,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 81-84, Kumamoto, Japan, 2025.
2. Yi Lu, Xin Ming, et al., “A Monolithic GaN IC with Temperature Compensated Active Clamp Driver and Short-Circuit Protection for Wide Power Supply Range,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 89-92, Kumamoto, Japan, 2025.
3. Zhao Wang, Qingchen Jiang, et al., “Mechanism of Leakage Current Degradation in p-GaN Gate HEMTs Under Gamma Irradiation,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 121-124, Kumamoto, Japan, 2025.
4. Cheng Yu, Wanjun Chen, et al., “ p-GaN Gate HEMT with the Buffer Hole Compensation Layer for Achieving Repetitive Avalanche-Like Breakdown Capability,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 701-704, Kumamoto, Japan, 2025.
第一單位Poster
1. Dingxiang Ma, Yuanqing Ye, et al., “Design and Performance Enhancement of Integrated Schottky Contact in Low-Voltage LDMOS on 55nm BCD Platform,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 153-156, Kumamoto, Japan, 2025.
2. Teng Liu, Hao Wang, et al., “High Reliability Tri-Zone Heterogeneous Charge Balanced SJ-LDMOS with Novel Silicon Rich Oxide and its Experimental Verification,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 157-160, Kumamoto, Japan, 2025.
3. Yun Dai, Zekun Zhou, et al., “An On-Chip Tunable Negative Power Supply Within SiC MOSFET Gate Driver for Spurious Conduction Suppression and Reliable Driving,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 161-164, Kumamoto, Japan, 2025.
4. Yuhan Chen, Xin Ming, et al., “A High Precision and Robustness Isolated Analog Signal Sensing for Monitoring Power Stages,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 181-184, Kumamoto, Japan, 2025.
5. Lei Tang, Jinggui Zhou, et al., “A Comprehensive Study on Device Reliability and Failure Mechanism of 650V p-GaN Gate HEMTs Under Long-Term HTRB Stress Beyond 150 ℃,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 189-192, Kumamoto, Japan, 2025.
6. Jinggui Zhou, Shuting Huang, et al., “Self-Aligned p-GaN Gate Controlled Diodes with Tunable Forward Conduction/Reverse Blocking Properties for High Efficiency Buck Converter,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 197-200, Kumamoto, Japan, 2025.
7. Ruize Sun, Renjie Wu, et al., “Experiment and Simulation Study of Single-Event Burnout in GaN Event-Triggering HEMTs,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 221-224, Kumamoto, Japan, 2025.
8. Huan Gao, Xin Zhou,, et al., “Heavy-Ion Radiation-Induced Dynamic On-Resistance Degradation for P-GaN Gate HEMTs,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 233-236, Kumamoto, Japan, 2025.
9. Zhuocheng Wang, Wanjun Chen, et al., “High Performance p-GaN Gate HEMT with TiNxOy Resistive Field Plate Structure,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 305-308, Kumamoto, Japan, 2025.
10. Tongyang Wang, Zehong Li, et al., “A Superjunction MOSFET with Self-Adjustable Electron Path for Low Reverse Recovery Charge,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 437-440, Kumamoto, Japan, 2025.
11. Guoliang Yao, Ming Qiao, and Bo Zhang. “Fabrication and Optimization of 1550 V Semi-Superjunction MOSFET with Ultra-Low Specific On-Resistance and Enhanced Switching Performance,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 441-444, Kumamoto, Japan, 2025.
12. Jiahao Hu, Xiaochuan Deng, et al., “An In-Depth Investigation of Gate Ringing Induced by Total Ionizing Dose in SiC MOSFETs,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 577-580, Kumamoto, Japan, 2025.
參與單位Oral
1. Jiajun Han, et al., “3 kV/2.9 mΩ·cm² β-Ga?O? Vertical p–n Heterojunction Diodes with Helium-Implanted Edge Termination and Oxygen Post Annealing,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 357-360, Kumamoto, Japan, 2025.
參與單位Poster
1. Yeying Huang, et al., “Enhancing Key Performance of Vertical p-NiO/n-GaN Heterojunction Diodes Through Plasma Treatment and Oxygen Post-Annealing,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 333-336, Kumamoto, Japan, 2025.
2. Jinpei Lin, et al., “Enhancing Key Performance of Vertical GaN MOS Capacitors Through GaOx Interface Technology,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 337-340, Kumamoto, Japan, 2025.
3. Ping Li, et al., “Low EMI Noise Superjunction MOSFET with an N-Dot Region in the P-Pillar,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 421-424, Kumamoto, Japan, 2025.
4. Jing Chen, et al., “Intelligent Design of Superjunction Devices based on Physics-Informed Neural Network,” 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), pp. 449-454, Kumamoto, Japan, 2025.
來(lái)源：電子科技大學(xué)集成電路學(xué)院
